1. Field of the Invention
The present invention is directed to a method for the recovery of a plesiochronic data signal in a demultiplexer of a digital transmission system, whereby the received sum signal which was generated in a transmitted digital signal transmitter, upon application of what is referred to as pulse stuffing, is divided into a synchronous data signal and into an additional data signal in a demultiplexer, whereby a data bit likewise transmitted in the additional data signal is inserted into the synchronous data signal in a format converter on the basis of a stuffing information transmitted in the additional data signal or, respectively, a bit is extracted from the synchronous data signal, and whereby a plesiochronic clock sequence is formed in a clock recovery stage, that plesiochronic data signal being read from the format converter with the plesiochronic clock sequence.
2. Description of the Prior Art
A digital signal transmission apparatus, for example in the periodical Frequenz, Vol. 32, No. 10, 1978, pp. 281-287, in the article entitled "Positiv-Null-Negativ-Stopftechnik fuer die Multiplexubertragung plesiochroner Datensignale" combines a plurality of digital signals of one hierarchy level into a digital signal of the next-higher hierarchy level, what is referred to as a sum signal. The bit rates and the pulse frames of the digital signals of the individual hierarchy levels are defined in international agreements. Transmission is thereby plesiochronic in all levels, i.e. the bit rates of the digital signals can upwardly or downwardly deviate from their nominal values by a maximum of a tolerance value. The relative tolerances are likewise defined. An n-channel transmission equipment for a n-plesiochronic data signal is composed of a multiplexer stage which groups the n-digital signals into a sum signal and of a demultiplexer stage which, in turn, resolves the sum signal into n-digital signals. The method with which the bit rates of the plesiochronic digital signals are adapted to the bit rate of the sum signal is known as pulse stuffing. A known method for this purpose is the positive-zero-negative stuffing of the CCITT recommendation G.702.
In the multiplexer stage of a digital signal transmission equipment, a synchronous data signal and an additional data signal are generated from the incoming plesiochronic data signal. When the bit rates of the plesiochronic and of the synchronous data signals, i.e. the appertaining plesiochronic or, respectively, sychronous clock sequence deviate from one another, then a stuffing procedure is required from time-to-time. When the bit rate of the plesiochronic signal is lower than that of the synchronous data signal, then an additional data bit is gated into the synchronous data signal from time-to-time or, respectively, one bit from the plesiochronic data signal is transmitted twice. When the bit rate of the plesiochronic data signal is higher than that of the synchronous data signal, then a data bit is removed from the plesiochronic data signal from time-to-time and is not transmitted in the synchronous data signal, but in the additional data signal. The additional data signal contains what are referred to as code words which signal the demultiplexer stage of the receiving digital signal transmission equipment that point in time at which a data bit must be removed from the synchronous data signal or, respectively, at which the data bit transmitted in the additional data signal must be inserted into the synchronous data signal. Upon utilization of the plesiochronic clock sequence recovered at the receiving side the plesiochronic data signal is recovered from the synchronous data signal on the basis of the insertion or, respectively, excision of a data bit or, respectively, of what is referred to as a purge bit.
Since the stuffing information in the form of specific code words is only transmitted once via the additional data signal, it can easily be falsified. Given nonrecognition, due to disturbed data transmission as the loss of synchronism of a data signal must be recognized at the dislocation of the frame word. For this reason, the stuffing instruction must be made far more resistant to error in radio transmission due to possible pulse disturbances.
The plesiochronic clock sequence must be reacquired in the demultiplexer of the receiving digital signal transmission equipment. For this purpose, a switch is undertaken to a somewhat slower or to a somewhat faster clock following a stuffing event for a respective compensation interval, dependent on whether stuffing was carried out positively or negatively. This method results in high jitter and a clock smoothing circuit is required for the elimination thereof.
The German published application No. 32 01 965, fully incorporated herein by this reference, discloses a digital signal transmission apparatus in which the additional data signal contains the momentary phase relationship between the plesiochronic clock sequence and the synchronous clock sequence as a binary phase word. For the purpose of recovering the plesiochronic clock sequence in the demultiplexer of the receiving digital signal transmission equipment from this binary phase word, a sum clock is withdrawn via a regenerator and via a divider, a reference data clock, a signal having 2.sup.k times the frequency of an auxiliary clock as well as a load pulse being capable of being generated from the sum clock via a phase control loop. In order to generate the clock sequence which is plesiochronic with respect to the reference data clock, a plesiochronic auxiliary clock is first acquired again and mixed with the sum clock, so that the desired plesiochronic clock sequence can be filtered from the signal mix via a filter.
It is conceivable to transmit these words in the additional data singal with such a high repetition frequency that two successive phase words can only differ in the least significant bit places.